{"id":1226,"date":"2013-09-14T01:00:00","date_gmt":"2013-09-13T23:00:00","guid":{"rendered":"https:\/\/www.fussylogic.co.uk\/blog\/?p=1226"},"modified":"2013-09-12T20:00:07","modified_gmt":"2013-09-12T19:00:07","slug":"stm32f4-based-logic-analyser","status":"publish","type":"post","link":"https:\/\/www.fussylogic.co.uk\/blog\/?p=1226","title":{"rendered":"STM32F4-based Logic Analyser"},"content":{"rendered":"

I\u00e2\u20ac\u2122ve been meaning to try this project<\/a> out for a while\u00e2\u20ac\u00a6 It\u00e2\u20ac\u2122s a basic logic analyser built on the STM32F4DISCOVERY<\/code> board.<\/p>\n

The STM32F4<\/code> runs at 168MHz, so we\u00e2\u20ac\u2122ve got a fair bit of bandwidth available. Nothing like a real logic analyser, but the project page reports 20MHz. For most of the microcontroller-based work I do, that will be more than sufficient.<\/p>\n

The author of LogicDiscovery is Russian, so documentation isn\u00e2\u20ac\u2122t easy to find; however Google translate does a good enough job on his descriptive blog<\/a> that it\u00e2\u20ac\u2122s possible to work out how to get started.<\/p>\n

While it\u00e2\u20ac\u2122s possible to download and compile the source yourself; I didn\u00e2\u20ac\u2122t bother. The author has supplied a binary image; so I just downloaded that and flashed it to my discovery board.<\/p>\n

$ openocd \\\n   -f \/usr\/share\/openocd\/scripts\/board\/stm32f4discovery.cfg \\\n   -c "init" \\\n   -c "reset halt" \\\n   -c "sleep 100" \\\n   -c "wait_halt 2" \\\n   -c "echo \\"--- Writing LogicDiscovery-r12.bin\\"" \\\n   -c "flash write_image erase LogicDiscovery-r12.bin 0x08000000" \\\n   -c "sleep 100" \\\n   -c "echo \\"--- Verifying\\"" \\\n   -c "verify_image LogicDiscovery-r12.bin 0x08000000" \\\n   -c "sleep 100" \\\n   -c "echo \\"--- Done\\"" \\\n   -c "resume" \\\n   -c "shutdown"\nOpen On-Chip Debugger 0.7.0 (2013-05-15-12:03)\nLicensed under GNU GPL v2\nFor bug reports, read\n        http:\/\/openocd.sourceforge.net\/doc\/doxygen\/bugs.html\nsrst_only separate srst_nogate srst_open_drain connect_deassert_srst\nInfo : This adapter doesn't support configurable speed\nInfo : STLINK v2 JTAG v14 API v2 SWIM v0 VID 0x0483 PID 0x3748\nInfo : Target voltage: 2.868772\nInfo : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints\ntarget state: halted\ntarget halted due to debug-request, current mode: Thread \nxPSR: 0x01000000 pc: 0x080038b4 msp: 0x10010000\n--- Writing LogicDiscovery-r12.bin\nauto erase enabled\nInfo : device id = 0x10016413\nInfo : flash size = 1024kbytes\nwrote 65536 bytes from file LogicDiscovery-r12.bin in 3.865705s (16.556 KiB\/s)\n--- Verifying\nverified 50196 bytes in 0.579957s (84.523 KiB\/s)\n--- Done\nshutdown command invoked<\/code><\/pre>\n
You can now connect the micro USB cable to your PC and you\u00e2\u20ac\u2122ll see a CDC serial port appear.<\/p>\n
usb 2-3: USB disconnect, device number 16\nusb 2-3: new full-speed USB device number 17 using ohci_hcd\nusb 2-3: New USB device found, idVendor=0483, idProduct=5740\nusb 2-3: New USB device strings: Mfr=1, Product=2, SerialNumber=3\nusb 2-3: Product: STM32 Virtual ComPort in FS Mode\nusb 2-3: Manufacturer: STMicroelectronics\nusb 2-3: SerialNumber: 00000000050C\ncdc_acm 2-3:1.0: This device cannot do calls on its own. It is not a modem.\ncdc_acm 2-3:1.0: ttyACM0: USB ACM device<\/code><\/pre>\n
Now we need a way of controlling and reading back the captured data. Fortunately LogicDiscovery<\/em> implements the standardised SUMP<\/em> protocol; and even more fortunately there is a nice SUMP client, Open Logic Sniffer<\/a> (or OLS) that talks that protocol. It\u00e2\u20ac\u2122s a Java application, so you\u00e2\u20ac\u2122ll need a JDK installed \u00e2\u20ac\u201c I had OpenJDK from Debian installed already, and it worked out of the box with the run.sh<\/code> script that comes with OLS.<\/p>\n
You need to be aware of a few limitations that LogicDiscovery imposes, and set up OLS accordingly. In the Begin Capture<\/em> dialog, do this:<\/p>\n